The 4-bit capacitive DAC is a monolithic, ultra-low power digital-to-analog converter silicon IP implemented in a 28nm CMOS process.
It features a single-ended charge-redistribution architecture based on binary-weighted metal–oxide–metal (MOM) capacitors, optimized for compact area. The output is delivered in a binary-weighted voltage format.
Feature
· • Single-ended 4-bit capacitive DAC
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• Asynchronous operation
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• Settling time: 3-13ns
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• Full-scale range (FSR) of reference voltage: GND+0.2V to VDD-0.4V
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• Resolution:
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- LSB: Reference voltage / 16
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• Integral non-linearity (INL): ±0.13 - ±0.32 LSB
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• Differential non-linearity (DNL): ±0.29 - ±0.42 LSB
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• Maximum switching glitch: 250mV
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• Power consumption: 1.2 nW
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• Operating temperature range: -20 – 65 ℃
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• 26 um^2 core area
Application
· • Analog MAC Operator/Machine Learning
Business Area
Automotive Radar or LiDAR system, Memory system
Category
Analog & Mixed Signal > D/A Converter
Tech Specs
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IP Name :
4-Bit Capacitive DAC
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Provider :
SeongHwan Cho
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Foundry :
SAMSUNG
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Technology :
28nm
Deliverables
· Schematic netlist & testbench
Validation Status
· Simulation-proven
Availability
Samsung 28nm Only
