• The proposed level shifter, named the diode-connected cross coupled pFET level shifter with staked split-input inverter (DCPLS-SSI) is a wide-range voltage conversion and energy-efficient solution for DRAM voltage conversion in 28 nm CMOS technology. The proposed level shifter can mitigate the current contention by using diode-connected cross coupled pFET structure, which enables wide-range voltage conversion. In addition, the stacked split-input inverter can reduce the short-circuit current of output inverter, which enable energy-efficient operation.
Feature
· • Area: 2.37um2
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• Delay: 1.79ns
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• Energy per transition: 8.08fJ
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• Static power: 0.35nW
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• Voltage conversion range: 0.227V to 1.2V @1MHz
Application
· • Data voltage conversion in DRAM
Business Area
DRAM memory system
Category
Verification IP > Memory > Dram
Tech Specs
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IP Name :
Level Shifter
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Provider :
정성욱 교수님, 고동한
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Foundry :
SAMSUNG
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Technology :
28nm
Deliverables
· Schematic netlist & GDS
Validation Status
· Chip measured
Availability
1Ynm DRAM technology
