This Operational Amplifier IP is a fully analog, low-power, differential-input, single-ended-output amplifier designed for integration in mixed-signal and low-voltage SoC platforms. It amplifies the differential voltage between two input nodes (VIN+ and VIN−) and provides a single-ended output (VOUT), making it suitable for use in ADC drivers, sensor interfaces, and general-purpose analog signal conditioning.
The op-amp operates with a single supply voltage. It includes differential input stages, high-gain amplification paths, and miller compensation network to ensure stable operation with closed loop configuration.
Structurally, the amplifier consists of a PMOS input differential pair with active current mirror loads, followed by a single-ended gain stage that converts the differential signal to a single-ended output. A Miller or feedforward compensation path is included to guarantee sufficient phase margin in unity-gain buffer configuration and other closed-loop applications.
The amplifier is designed for use in both open-loop and closed-loop configurations. In closed-loop use, the feedback network determines the effective gain, while the amplifier ensures linearity and stability. No digital inputs or control interfaces are required, and the amplifier responds continuously to analog input variations.
Feature
· • Differential input, Single-ended output
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• Low supply voltage operatable (VDD = 1 V)
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• High dc gain > 80 dB with two stage structure
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• Maintains robust performance under PVT variations (in unity-gain buffer configuration, PM > 45°)
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• 1,800 um2 core area
Application
· Process-In-Memory Application (ex. Component of Output interface between analog computing-based CNN
Business Area
Automotive Radar or LiDAR system, Memory system
Category
Analog & Mixed Signal > Amplifier
Tech Specs
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IP Name :
Analog op-amp
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Provider :
Minoo Lee, Junghyup Lee
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Foundry :
SAMSUNG
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Technology :
28nm
Deliverables
· Schematic netlist & testbench
Validation Status
· Simulation-proven
Availability
Samsung 28nm Only