The SAR ADC IP is a 7-bit analog to digital convertor that can convert analog signal to digital domain within resolution of 7-bit.
The output is a 7-bit digital signal with redundant bit.
The SAR ADC IP enables high-speed data conversion speed of 1.25GSample per second
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The LDO IP is a linear voltage regulator that can regulate the output voltage, which is lower than the supply voltage. The constant output voltage generated by the LDO is supplied to the VDD of the load system with low noise.
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The RISC-V IP is a PIM-friendly top control processor that supports general ISA for non-linear and non-convolution functions. To support both cache coherence and direct communication with PIM, custom-designed cache writes policies of write-through(uncached) and write-back(cached) are supported.
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The frequency synthesizer generates a range of frequencies from a single reference frequency, which usually comes from a crystal oscillator. Frequency synthesizers are one of the most critical building blocks in modern electronic devices, such as mobile telephones, laptops, televisions, radiotelephones, satellite communications, GPS systems, etc. One of the popular types of frequency synthesizers is a phase-locked loop (PLL). In Processing-in-Memory (PIM), PLL will be designed and used to synchronize a clock inside the PIM.
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The DSPU IP is a depth signal processor that generates a 3-D depth image from a 2-D image.
The output is a 3-D dense depth image aligned with a 2-D RGB image.
The DSPU IP enables to adjust depth quality, such as resolution, framerate, and power modes, by configuration.
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34141 대전광역시 유성구 대학로 291 한국과학기술원 (KAIST) 3층 A301 ~ A304호
