• This MAC (Multiplication and Accumulation) circuit performs computations on 64 pairs of 8-bit inputs and 8-bit weights. The input values are provided in digital form, and the intermediate computation results are stored as analog voltage levels through capacitive coupling. Once the final analog voltage generation is complete, the result is converted back into an 8-bit digital value using an Analog-to-Digital Converter (ADC), thus completing the computation process. To enable parallel multiplication and accumulation of the 64 input-weight pairs, the MAC circuit is composed of 64 "unit multipliers" connected along a long accumulation line. Each unit multiplier multiplies the same 8-bit input and 8-bit weight. In each unit, the weight is fixed, and the input is streamed in a bit-serial manner, two bits at a time, to perform the multiplication. The multiplication result drives an internal capacitor driver within the multiplier. If the result is 1, the driver induces a voltage change on the accumulation line via capacitive coupling; if the result is 0, no voltage change occurs. This mechanism generates an analog voltage that reflects the accumulated result. To support floating-point computation characteristics, the circuit first determines the maximum exponent among the 64 input-weight pairs. Each unit multiplier receives the exponent difference between its own input-weight pair and this maximum exponent. Based on the received exponent difference, each unit adjusts the timing of input bit streaming to reflect the relative exponent alignment among the floating-point numbers. As a result, the MAC circuit generates an analog voltage in the range of 426 mV to 973 mV, and the ADC quantizes this voltage range into an 8-bit digital output.