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KAIST AI-PIM PIM반도체연구센터

IP 검색

I/O Sense Amplifier

• The proposed sense amplifier, named the Static Current-Free Pre-Sensing IO Sense Amplifier (SCFP-IOSA), is a high-speed, low-power sensing solution for DRAM global I/O in 28 nm CMOS technology. It employs a direct input transfer architecture using a single coupling capacitor (CC) and introduces a static current-free pre-sensing technique to minimize offset voltage (VOS), area, and energy overhead. Unlike conventional offset cancellation (OC)-based I/O sense amplifiers, which suffer from input voltage attenuation, large area due to dual CCs, and static current during sensing, SCFP-IOSA eliminates attenuation by directly transferring the input differential voltage (ΔVGIO) and avoids static current using exponential RC pre-amplification. The proposed design separates ΔVGIO generation and sensing by GIO switches, allowing simultaneous offset cancellation and input development. This reduces sensing time overhead and enables a fast sensing time of 3.75 ns, with 2.15 μW power consumption, and 10.28 μm² area, achieving 3× lower σVOS, 2.9× lower power, and 4.46× smaller area compared to state-of-the-art OC-IOSA. Moreover, it shows robust sensing yield even in noisy conditions, and maintains performance at low supply voltages. These characteristics make SCFP-IOSA highly suitable for next-generation low-voltage, high-density DRAM applications, particularly in 1Ynm-class or beyond.

Feature
· • Sensing time: < 3.75ns
· • Area: 10.28um2
· • Energy: 30.15fJ
· • 1σMAX = 4.42mV (in @1.0V)
Application
· • 1Ynm DRAM Global I/O (GIO) line RC (Resistance & Capacitance) modeling
· • I/O sense amplifier (BLSA
Business Area
DRAM memory system
Category

Verification IP > Memory > Dram


Tech Specs
  • IP Name :

    I/O Sense Amplifier

  • Provider :

    정성욱 교수님, 임도윤

  • Foundry :

    SAMSUNG

  • Technology :

    28nm

Deliverables
· Schematic netlist & GDS
Validation Status
· Chip measured
Availability
1Ynm DRAM technology
Functional Diagram
Benefits
·
List