The ‘Voltage comparator’ is an analog IP block that accepts two analog voltage inputs: INP (positive input) and INN (negative input). It evaluates the polarity of the differential input voltage (INP - INN) and produces a differential digital output through OUTP and OUTN nodes. The comparison process is gated by a digital control signal, EN, which acts as a clock or trigger. Upon receiving a rising edge or high-level pulse at EN, the comparator enters an evaluation phase, internally activates the decision circuitry, and latches the result based on the instantaneous differential input. The output is inversed signal versus EN. The output settles quickly to a valid logic level using an internal regenerative latch, providing robust and noise-immune decisions even under small input differences. Fabricated in a 28nm CMOS Low power process.