The Flash ADC is a monolithic, high-speed, low-latency analog-to-digital converter silicon IP optimized for applications requiring ultra-fast signal acquisition and minimal conversion delay. Utilizing a fully parallel architecture, the IP achieves one-clock-cycle conversion by simultaneously comparing the single-ended input signal (IN) against voltage reference using the array of 2^5-1 high-speed clocked comparators. Reference voltages for comparator array are generated by external resistor ladder with bias. The IP includes thermometer-to-binary encoding for making 5bit digital output (OUT). It supports high-frequency sampling up to 200MHz. Fabricated in a 28 nm CMOS process, the IP occupies 0.04mm2 of core area.
Feature
· • 5-bit Flash ADC
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• Up to 200 MSPS Conversion Rate in Single Channel mode
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• Input Swing: 0.1 to 0.25V p-p single-ended
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• Dynamic Performance
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- 31 dBFS SNR at Fin = 30 MHz
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- 43.6 dBc SFDR at Fin = 30 MHz
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• Power Consumption
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- 0.423 mW at 200 MSPS
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• Internal thermometer-to-binary encoder
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• 0.04 mm^2 Core Area
Application
· Process-In-Memory Application
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ex. Output interface between analog computing-based CNN layer and digi
Business Area
Automotive Radar or LiDAR system, Memory system
Category
Analog & Mixed Signal > A/D Converter
Tech Specs
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IP Name :
5-B Flash ADC
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Provider :
SeongHwan Cho
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Foundry :
SAMSUNG
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Technology :
28nm
Deliverables
· Schematic netlist
·
testbench
Validation Status
· Simulation-proven
Availability
Samsung 28nm Only