IP 검색 Category Analog & Mixed Signal(14) Memory Controller & PHY(0) Memory & Logic Library(9) Interface Controller & PHY(0) Processor Solutions(3) Arithmetic & Mathematic IP(1) Peripheral(1) Network-on-Chip (NoC)(0) Multimedia(0) Comumnication(0) Platform Level IP(0) Security IP(1) Other IP(0) Software Development & Debug Tool(1) Other(83) Verification IP(9) Technology 3nm 4nm 5nm 7nm 8nm 10nm 12nm 14nm 16nm 20nm 22nm 28nm 32nm 40nm 45nm 55nm 65nm 90nm 130nm 150nm 180nm 250nm 350nm 500nm FPGA N/A Foundry Others N/A Search IP 전체 제목 내용 검색 전체 119건 현재 페이지 3/30 4:64 deserializer for 50Gb/s SerDes receiver (차세대지능형반도체사업단) · Chip-to-Chip interface system 지원 가능한 56Gb/s 4:64 deserializer 2024-08-29 5-B Flash ADC The Flash ADC is a monolithic, high-speed, low-latency analog-to-digital converter silicon IP optimized for applications requiring ultra-fast signal acquisition and minimal conversion delay. Utilizing a fully parallel architecture, the IP achieves one-clock-cycle conversion by simultaneously comparing the single-ended input signal (IN) against voltage reference using the array of 2^5-1 high-speed clocked comparators. Reference voltages for comparator array are generated by external resistor ladder with bias. The IP includes thermometer-to-binary encoding for making 5bit digital output (OUT). It supports high-frequency sampling up to 200MHz. Fabricated in a 28 nm CMOS process, the IP occupies 0.04mm2 of core area. 2025-06-23 50Gb/s SerDes receiver for Chip-to-Chip interface system (차세대지능형반도체사업단) · 56Gb/s 지원 가능한 Quarter-rate 구조의 receiver interface 2024-08-29 50Gb/s SerDes transmitter for Chip-to-Chip interface system (차세대지능형반도체사업단) Quarter-rate clocking 구조를 이용한 56Gb/s transmitter 2024-08-29 처음으로 이전페이지 1 2 3 4 5 6 7 8 9 10 >다음페이지 마지막으로
